Status Byte and Event Registers |
The instrument includes a number of standard registers:
the "Standard Event Status Register", "Standard Event Status Enable Register",
"Status Byte Register",
"Event Status Register 0", and "Event Status Enable Register 0".
Each bit of the status byte is a summary (logical OR) of the event register corresponding to that bit.
Status byte |
Contents |
bit 7 |
Unused: 0 |
bit 6 |
Reserved. |
bit 5 |
Event summary bit. |
bit 4 |
Message available |
bit 3 |
Unused: 0 |
bit 2 |
Unused: 0 |
bit 1 |
Unused: 0 |
bit 0 |
Event summary bit 0 |
The following commands read the status byte.
Read the status byte |
*STB? |
Bit 5 of the status byte indicates the summary of this register.
The following events clear the contents of the Standard Event Status Register:
When the *CLS command is received.
When the contents have been read by an *ESR? query.
When power is turned off and on again.
Standard Event |
Contents |
bit 7 |
Power has been turned on again. |
bit 6 |
User request: not used. |
bit 5 |
Command error. |
bit 4 |
Execution error. |
bit 3 |
Device-dependent error. |
bit 2 |
Query error. |
bit 1 |
Request for controller rights (not used) |
bit 0 |
Operation finished. |
The following commands are used to read the Standard Event Status Register.
Read the Standard Event Status Register |
*ESR? |
The summary of this register is set in bit 0 of the status byte.
The following events clear the contents of Event Status Register 0:
When the *CLS command is received.
When the contents have been read by an :ESR0? query.
When power is turned off and on again.
Event Status Register 0 |
Contents |
bit 7 |
Unused. |
bit 6 |
Unused. |
bit 5 |
Parameter calculation finished. |
bit 4 |
Unused. |
bit 3 |
Printer operation finished (print, or copy output). |
bit 2 |
Trigger wait finished (set when a trigger event occurs). |
bit 1 |
Measurement operation concluded (set by STOP). |
bit 0 |
Error not related to the USB interface. |
The following commands read the Event Status Register 0.
Read Event Status Register 0 |
:ESR0? |